TY  - BOOK
AU  - Svensson,Lars
AU  - Monteiro,Jose
ED  - PATMOS 2008
ED  - SpringerLink (Online service)
TI  - Integrated circuit and system design: power and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers 
SN  - 9783540959489 (electronic bk.)
U1  - 621.395 22
PY  - 2009///
CY  - Berlin, Heidelberg
PB  - Springer Berlin Heidelberg
KW  - Integrated circuits
KW  - Very large scale integration
KW  - Computer-aided design
KW  - Congresses
KW  - Computer Science
KW  - Circuits and Systems
KW  - System Performance and Evaluation
KW  - Logic Design
KW  - Memory Structures
KW  - Processor Architectures
KW  - Arithmetic and Logic Structures
UR  - https://eresourcesptsl.ukm.remotexs.co/user/login?url=http://dx.doi.org/10.1007/978-3-540-95948-9
ER  -