Design of cost-efficient interconnect processing units  Spidergon STNoC /  [electronic resource] : 
Marcello Coppola 
 - Boca Raton :  Taylor & Francis,  2009 
 - System-on-chip design and technologies ;  2 .
<br/><br/> Access to 2http://www.egnetbase.com/ejournlas/search/advsearch1.asp3 and type the title. You may access the full text in the advanced search screen  'A CRC title.' 
<br/><br/>Includes bibliographical references and index 
<br/><br/><label>ISBN: </label>9781420044713 
<br/><br/><label>LCCN: </label>2008-026558 
<br/><br/><label>Subjects--Corporate Names: </label><br/>ST Microelectronics
<br/><br/><label>Subjects--Topical Terms: </label><br/>Networks on a chip<br/>Microprocessors
<br/><br/><label>Dewey Class. No.: </label>004.1