Boule, Marc. <br/><br/>
Generating Hardware Assertion Checkers  For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring /  [electronic resource] : 
by Marc Boule, Zeljko Zilic. 
 - Dordrecht :  Springer Science + Business Media B.V,  2008. 
 - 280 p. :  ill., digital ;  24 cm. 
<br/><br/><label>ISBN: </label>9781402085864 (electronic bk.) 9781402085857 (paper) 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Online data processing.<br/>Integrated circuits--Verification.
<br/><br/><label>LC Class. No.: </label>TK7874.75  / .F67 1997 
<br/><br/><label>Dewey Class. No.: </label>621.395